(1) Field of the Invention
The present invention relates to an output power error absorbing circuit and a multi-carrier transmitter having the same, relating to a technique suitable for use to a radio communication apparatus having a multi-carrier amplifying function used in a cellular telephone system, a basic communication system, a broadcasting system or the like, for example.
(2) Description of Related Art
In the known code multiplexed signal circuit used in a transmitter in CDMA (Code Division Multiple Access) system, a power peak generates when codes and carrier signals are multiplexed, the peak components fall within the saturation region of the gain characteristic of the power amplifier after analog conversion, which causes distortion in the transmission signals. In order to suppress the peak components, a peak suppressing circuit is used.
FIG. 9 is a block diagram showing structures of essential parts of a multi-carrier transmitter (code multiplexed signal circuit) having the known peak suppressing circuit. The transmitter shown in FIG. 9 comprises carrier transmitting circuits 101 provided for a plurality of carrier signals (here, four carriers of C1, C2, C3 and C4), respectively, a carrier combining (multiplexing) circuit 102 combines the outputs from the carrier transmitting circuits 101, and a peak suppression value arithmetic circuit 103 which detects a power peak value after the carrier signals are combined, determines a peak suppression value (power correction value) used to suppress the peak value, corrects the gain of each of the carrier signals before combined by the carrier combining circuit 102 by using the peak suppression value, thereby suppressing the peak value after the carrier signals are combined.
Each of the carrier transmitting circuits 101 transmits a signal (carrier signal) at a predetermined carrier frequency. As shown in FIG. 9, each of the carrier transmitting circuits 101 comprises a delay circuit 111, multipliers 112, 114 and 117, digital filters 113 and 116, and local oscillators 115 and 118. The delay circuit 111, basically, delays inputted carrier signal data by predetermined symbols, and the digital filter (base band filter) 113 performs digital filtering (waveform shaping) on the data in order to remove the inter symbol interference (ISI). This filtering process is performed in order to prevent the data demodulation in the receiver from becoming difficult or impossible because interference occurs before and after certain data (symbol), and the eye pattern is confined when the data is modulated and demodulated. It is preferable that the digital filter 113 has the RRC (Root Raised Cosine) characteristic, and is a filter having the Raised Cosine characteristic at the combination of transmission and reception, for example.
The data undergone the filtering process is then undergone frequency shift by the multiplier 114 and the local oscillator 115 so that the data is in predetermined carrier frequency arrangement, and outputted to the carrier multiplexing circuit 102. Before the frequency shift, the multiplier 112 multiples the data by a suppression value determined by the peak suppression value arithmetic circuit 103, whereby the peak power is beforehand suppressed so as not to fall within the saturation region of a power amplifier (not shown) in the following stage (namely, so as not exceed the allowable input power value of the power amplifier).
On the other hand, the peak suppression value arithmetic circuit 103 comprises, as shown in FIG. 9, a combining (multiplexing) circuit 131, a digital filter 132, a power arithmetic circuit 133, a set threshold value comparing circuit 134 and a coefficient calculating circuit 135, for example. Each of signals is inputted to the combining circuit 131 through the digital filter 116, the multiplier 117 and the local oscillator 118 as a signal equivalent to the carrier signal to be outputted to the carrier multiplexing circuit 102. The combining circuit 131 combines (multiplexes) these signals. The digital filter 132 removes noise components (high frequency components) generated at the time of the frequency shift. The power arithmetic circuit 133 then determines a power value of the compound output of the carrier signals before undergone the peak suppression in computing. The set threshold value comparing circuit 134 compares the obtained power value with a peak suppression set value to detect a difference (error) between them. The multiplier 112 in each of the carrier transmitting circuit 101 calculates a coefficient (peak suppression value), by which the carrier signal is to be multiplied, according to the difference. The obtained peak suppression value is inputted to each of the multipliers 112 as a common value to the carrier transmitting circuits 101, and each of the carrier signals is multiplied by the same peak suppression value.
As above, the power peak value after the carrier signals are multiplexed by the carrier multiplexing circuit 102 can be prevented from falling in the saturation region of the power amplifier in the following stage, and generation of signal distortion can be effectively suppressed without an expensive amplifier having wide linearity in the input/output characteristics. The above peak suppression set value determines a PAR (Peak Average Ratio) of the transmitter's output. By decreasing this set value, more signal power is suppressed.
According to the technique described in Patent Document 1, the peak of transmission data of one symbol is detected by a peak detector, a dummy symbol is generated so as to cancel the peak when the detected peak is larger than the input limitation power of the transmission amplifier, the dummy symbol is subtracted from the transmission data of one symbol delayed by a symbol delay circuit to reduce the peak, a power correction value is calculated by a level adjustment calculating unit in order to compensate a change in power due to the subtraction, the transmission data is multiplied by the power correction value to correct the power (refer to the abstract of Patent Document 1).
According to the technique described in Patent Document 2, an envelope magnitude predictor obtains an estimation value of the magnitude of the envelope generated when the inputted base band signals are modulated, a scaling factor sufficient for reducing peak power spikes is obtained from a mapping table on the basis of a ratio of the estimation value to the a maximum acceptable envelop magnitude, the transmission signal is multiplied by the scaling factor, whereby the peak power spikes can be lowered (refer to the abstract of Patent Document 2).
[Patent Document 1] Japanese Patent Laid-Open No. 2000-106548
[Patent Document 2] Japanese National Publication of the Translated Version (of PCT Application) No. 2003-522433
However, when the peak suppression described above is performed, a part of the signal components is cut as described in paragraph 0008 in Patent Document 1, which causes generation of an output power error for each setting of the peak suppression at the output of the power amplifier after analog conversion.
FIG. 10 shows a change in output power occurring due to the peak suppression when data having a normal output of +46.0 dBm in the case of four carriers is inputted, for example. FIG. 11 shows a change in output power occurring due to the peak suppression when data having a normal output power of 40.0 dBm in the case of one carrier is inputted. In FIGS. 10 and 11, when the PAR is set to 7.5 dB, for example, the output is +45.7 dBm in the case of four carriers, whereas the output is 39.9 dBm (approximately 40.0 dBm) at the time of one carrier. It is found from the above that an error of 0.3 dB generates as compared with the normal output.
In the present situation, the error caused by the peak suppression set value is corrected by that the peak suppression value is fixed and shared by the carriers as above, a gain setting position is provided at another position in the following stage to make the output power constant, in general. In such structure, an error does not generate in the same carrier setting because the peak suppression value is constant. However, a difference in the number of carriers causes an error although a difference in power between one carrier and four carriers should be 6.0 dB (four times). A difference in power due to a difference in the number of carriers should be 3.0 dB (two times) in the case of two carriers, and 4.8 dB (three times) in the case of three carriers, as compared with one carrier.
Since an error generating in each carrier setting is not defined in the specification of the transmission output, the generating error is left as it is. However, it is preferable that a desired transmission power can be obtained without an error even when the number of carriers or the carrier arrangement varies because the near-far problem exists in the communication systems using CDMA technology.
The techniques described in Patent Documents 1 and 2 allow suppression of the peak power in consideration of the saturation region of the power amplifier, that is, the input limitation power or the acceptable envelope, but pay no attention to the state of carriers (the number or arrangement). Thus, an error inevitably generates due to a difference in carrier setting.